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 DATA SHEET
SILICON POWER MOS FET
NE5500179A
4.8 V OPERATION SILICON RF POWER LD-MOS FET FOR 1.9 GHz 1 W TRANSMISSION AMPLIFIERS
DESCRIPTION
The NE5500179A is an N-channel silicon power MOS FET specially designed as the transmission driver amplifier for 4.8 V GSM 1 800 and GSM 1 900 handsets. Dies are manufactured using NEC's NEWMOS technology (NEC's 0.6 m WSi gate lateral-diffusion MOS FET) and housed in a surface mount package. The device can deliver 30.0 dBm output power with 55% power added efficiency at 1.9 GHz under the 4.8 V supply voltage, or can deliver 27 dBm output power with 50% pozwer added efficiency at 3.5 V, respectively.
FEATURES
* High output power * High linear gain * Surface mount package * Single supply : Pout = 30.0 dBm TYP. (VDS = 4.8 V, IDset = 200 mA, f = 1.9 GHz, Pin = 20 dBm) : GL = 14.0 dB TYP. (VDS = 4.8 V, IDset = 200 mA, f = 1.9 GHz, Pin = 10 dBm) : 5.7 x 5.7 x 1.1 mm MAX. : VDS = 3.0 to 6.0 V * High power added efficiency : add = 55% TYP. (VDS = 4.8 V, IDset = 200 mA, f = 1.9 GHz, Pin = 20 dBm)
APPLICATIONS
* Digital cellular phones : 4.8 V driver amplifier for GSM 1 800/ GSM 1 900 class 1 handsets, or 4.8 V final stage amplifier * Digital cordless phones : 3.5 V final stage amplifier for DECT * Others : General purpose amplifiers for 1.6 to 2.5 GHz TDMA applications
ORDERING INFORMATION
Part Number NE5500179A-T1 Package 79A Marking R1 Supplying Form * 12 mm wide embossed taping * Gate pin face the perforation side of the tape * Qty 1 kpcs/reel
Remark To order evaluation samples, consult your NEC sales representative. Part number for sample order: NE5500179A
Caution Please handle this device at static-free workstation, because this is an electrostatic sensitive device.
The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC Compound Semiconductor Devices representative for availability and additional information.
Document No. PU10118EJ01V1DS (1st edition) (Previous No. P15190EJ1V0DS00) Date Published April 2002 CP(K) Printed in Japan
The mark ! shows major revised points.
NEC Corporation 1999 NEC Compound Semiconductor Devices 2002
NE5500179A
ABSOLUTE MAXIMUM RATINGS (TA = +25C)
Parameter Drain to Source Voltage Gate to Source Voltage Drain Current Drain Current (Pulse Test) ID Symbol VDS VGSO ID
Note
Ratings 8.5 5.0 0.25 0.5 10 125 -65 to +125
Unit V V A A W C C
!
Total Power Dissipation Channel Temperature Storage Temperature
Ptot Tch Tstg
!
Note Duty Cycle 50%, Ton 1 s
RECOMMENDED OPERATING CONDITIONS
Parameter Drain to Source Voltage Gate to Source Voltage Symbol VDS VGSO ID Pin Duty Cycle 50%, Ton 1 s f = 1.9 GHz, VDS = 4.8 V Test Conditions MIN. 3.0 0 - 0 TYP. 4.8 2.0 340 20 MAX. 6.0 3.5 - 22 Unit V V mA dBm
!
Drain Current (Pulse Test) Input Power
ELECTRICAL CHARACTERISTICS (TA = +25C)
Parameter Gate to Source Leak Current Saturated Drain Current (Zero Gate Voltage Drain Current) Gate Threshold Voltage Transconductance Drain to Source Breakdown Voltage Thermal Resistance Linear Gain Symbol IGSO IDSS Vth gm BVDS Rth GL Test Conditions VGSS = 5.0 V VDSS = 8.5 V VDS = 4.8 V, IDS = 1 mA VDS = 4.8 V, IDS = 250 mA IDSS = 10 A Channel to Case f = 1.9 GHz, Pin = 10 dBm, VDS = 4.8 V, IDset = 200 mA, Note 1, 2 f = 1.9 GHz, Pin = 20 dBm, VDS = 4.8 V, IDset = 200 mA, Note 1, 2 MIN. - - 1.0 - 20 - - TYP. - - 1.45 420 24 10 14.0 MAX. 100 100 2.0 - - - - - - - Unit nA nA V mS V C/W dB
Output Power Operating Current Power Added Efficiency
Pout Iop
28.5 - 48
30.0 340 55
dBm mA %
add
!
Notes 1. Peak measurement at Duty Cycle 50%, Ton 1 s. 2. DC performance is 100% testing. RF performance is testing several samples per wafer. Wafer rejection criteria for standard devices is 1 reject for several samples.
2
Data Sheet PU10118EJ01V1DS
NE5500179A
TYPICAL CHARACTERISTICS (TA = +25C)
DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE
3.5 3.0
Drain Current ID (A)
SET DRAIN CURRENT vs. GATE TO SOURCE VOLTAGE
1 000 VDS = 4.8 V
Set Drain Current IDset (mA)
VGS = 10 V MAX. Step = 1.0 V
2.5 2.0 1.5 1.0 0.5 0 2 4 6 8 10 12 14 16
100
10
1
0.1 1.0
1.5
2.0
2.5
3.0
Drain to Source Voltage VDS (V)
Gate to Source Voltage VGS (V)
OUTPUT POWER, DRAIN CURRENT vs. INPUT POWER
35
Drain Efficiency d (%) Power Added Efficiency add (%)
DRAIN EFFICIENCY, POWER ADDED EFFICIENCY vs. INPUT POWER
500 100 VDS = 4.8 V IDset = 100 mA f = 1.9 GHz
Output Power Pout (dBm)
Pout 25 300
Drain Current ID (mA)
30
VDS = 4.8 V IDset = 100 mA f = 1.9 GHz
400
d
50
20 ID 15
200
add
100 0 30
10 0
5
10
15
20
25
0
5
10
15
20
25
30
Input Power Pin (dBm)
Input Power Pin (dBm)
OUTPUT POWER, DRAIN CURRENT vs. GATE TO SOURCE VOLTAGE
31 VDS = 4.8 V f = 1.9 GHz Pin = 20 dBm Pout 500
DRAIN EFFICIENCY, POWER ADDED EFFICIENCY vs. GATE TO SOURCE VOLTAGE
100
Drain Efficiency d (%) Power Added Efficiency add (%)
Output Power Pout (dBm)
Drain Current ID (mA)
30
400
VDS = 4.8 V f = 1.9 GHz Pin = 20 dBm
29 ID 28
300
d
50
add
200
27
100 0 4.0
26 0.0
1.0
2.0
3.0
0
1.0
2.0
3.0
4.0
Gate to Source Voltage VGS (V)
Gate to Source Voltage VGS (V)
Data Sheet PU10118EJ01V1DS
3
NE5500179A
OUTPUT POWER, DRAIN CURRENT vs. INPUT POWER
30
Drain Efficiency d (%) Power Added Efficiency add (%)
DRAIN EFFICIENCY, POWER ADDED EFFICIENCY vs. INPUT POWER
500 100 VDS = 3.5 V IDset = 100 mA f = 1.9 GHz
Output Power Pout (dBm)
Drain Current ID (mA)
25
VDS = 3.5 V IDset = 100 mA f = 1.9 GHz
Pout 400
20
300
d
50
add
15 ID 10
200
100 0 30
5 0
5
10
15
20
25
0
5
10
15
20
25
30
Input Power Pin (dBm)
Input Power Pin (dBm)
OUTPUT POWER, DRAIN CURRENT vs. GATE TO SOURCE VOLTAGE
28 VDS = 3.5 V f = 1.9 GHz Pin = 18 dBm Pout 500
DRAIN EFFICIENCY, POWER ADDED EFFICIENCY vs. GATE TO SOURCE VOLTAGE
100
Drain Efficiency d (%) Power Added Efficiency add (%)
Output Power Pout (dBm)
Drain Current ID (mA)
27
400
VDS = 3.5 V f = 1.9 GHz Pin = 18 dBm
26
300
d
50
add
25 ID 24
200
100 0 4.0
23 0.0
1.0
2.0
3.0
0
1.0
2.0
3.0
4.0
Gate to Source Voltage VGS (V)
Gate to Source Voltage VGS (V)
OUTPUT POWER, DRAIN CURRENT vs. INPUT POWER
30 Pout
Drain Current ID (mA) Drain Efficiency d (%) Power Added Efficiency add (%)
DRAIN EFFICIENCY, POWER ADDED EFFICIENCY vs. INPUT POWER
500 100 VDS = 4.5 V IDset = 100 mA f = 460 MHz
Output Power Pout (dBm)
25
VDS = 4.5 V IDset = 100 mA f = 460 MHz
400
d
20
300
50
add
15 ID 10
200
100 0 25
5 -5
0
5
10
15
20
0 -5
0
5
10
15
20
25
Input Power Pin (dBm)
Input Power Pin (dBm)
4
Data Sheet PU10118EJ01V1DS
NE5500179A
OUTPUT POWER, DRAIN CURRENT vs. GATE TO SOURCE VOLTAGE
30 Pout
Output Power Pout (dBm)
DRAIN EFFICIENCY, POWER ADDED EFFICIENCY vs. GATE TO SOURCE VOLTAGE
600 500
Drain Current ID (mA) Drain Efficiency d (%) Power Added Efficiency add (%)
100
25 20 15 10 5 ID VDS = 4.5 V f = 460 MHz Pin = 15 dBm 2.0 3.0
VDS = 4.5 V f = 460 GHz Pin = 15 dBm
400 300 200 100 0 4.0
d
50
add
0
1.0
0
1.0
2.0
3.0
4.0
Gate to Source Voltage VGS (V)
Gate to Source Voltage VGS (V)
OUTPUT POWER, DRAIN CURRENT vs. INPUT POWER
30 Pout
Drain Current ID (mA) Drain Efficiency d (%) Power Added Efficiency add (%)
DRAIN EFFICIENCY, POWER ADDED EFFICIENCY vs. INPUT POWER
500 100 VDS = 3.5 V IDset = 100 mA f = 850 MHz
Output Power Pout (dBm)
25
VDS = 3.5 V IDset = 100 mA f = 850 MHz
400
20
300
d
50
15 ID 10
200
add
100 0 25
5 -5
0
5
10
15
20
0 -5
0
5
10
15
20
25
Input Power Pin (dBm)
Input Power Pin (dBm)
OUTPUT POWER, DRAIN CURRENT vs. INPUT POWER
30
Drain Efficiency d (%) Power Added Efficiency add (%)
DRAIN EFFICIENCY, POWER ADDED EFFICIENCY vs. INPUT POWER
500 100 VDS = 3.0 V IDset = 100 mA f = 2.45 GHz
Output Power Pout (dBm)
20 ID
300
Drain Current ID (mA)
25
VDS = 3.0 V IDset = 100 mA f = 2.45 GHz
Pout 400
d
50
15
200
10
100 0 30
add
5 0
5
10
15
20
25
0
5
10
15
20
25
30
Input Power Pin (dBm)
Input Power Pin (dBm)
Data Sheet PU10118EJ01V1DS
5
NE5500179A
OUTPUT POWER, DRAIN CURRENT vs. GATE TO SOURCE VOLTAGE
30 VDS = 3.0 V f = 2.45 GHz Pin = 18 dBm 500 Pout
DRAIN EFFICIENCY, POWER ADDED EFFICIENCY vs. GATE TO SOURCE VOLTAGE
100
Output Power Pout (dBm)
20 ID 15
300
Drain Current ID (mA)
25
400
Drain Efficiency d (%) Power Added Efficiency add (%)
VDS = 3.0 V f = 2.45 GHz Pin = 18 dBm
50
200
d add
10
100 0 4.0
5 0.0
1.0
2.0
3.0
0
1.0
2.0
3.0
4.0
Gate to Source Voltage VGS (V)
Gate to Source Voltage VGS (V)
Remark The graphs indicate nominal characteristics.
6
Data Sheet PU10118EJ01V1DS
NE5500179A
S-PARAMETERS
Test Conditions: VDS = 4.8 V, IDset = 100 mA
Frequency
S11 MAG. 0.844 0.792 0.757 0.747 0.746 0.751 0.756 0.772 0.777 0.785 0.796 0.804 0.814 0.820 0.827 0.832 0.833 0.846 0.843 0.850 0.851 0.854 0.861 0.857 0.870 0.870 0.867 0.870 0.873 0.882 ANG. -69.6 -107.8 -127.4 -138.7 -146.2 -151.8 -155.6 -159.5 -162.3 -165.0 -167.7 -169.9 -172.4 -174.6 -176.8 -179.6 177.9 175.6 172.9 170.3 167.1 165.1 162.3 159.5 156.6 153.9 151.6 148.9 146.5 143.9 dB 25.2 21.7 18.7 16.4 14.5 12.7 11.3 9.9 8.8 7.6 6.7 5.7 4.8 4.0 3.2 2.5 1.5 1.1 0.2 0.0 -1.0 -1.6 -2.4 -2.3 -3.4 -3.6 -5.0 -4.8 -5.6 -5.7
GHz 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0
S21 MAG. 18.11 12.12 8.58 6.58 5.28 4.32 3.68 3.12 2.75 2.40 2.17 1.91 1.74 1.58 1.45 1.33 1.19 1.13 1.02 0.99 0.89 0.83 0.75 0.76 0.67 0.65 0.56 0.57 0.52 0.51
ANG. 135.5 112.3 98.8 89.4 82.1 76.2 70.9 65.9 61.3 58.2 53.7 51.4 46.4 44.3 39.7 38.4 34.6 31.6 28.3 27.1 23.3 21.4 16.9 15.5 13.8 12.0 9.0 3.9 4.7 2.7
dB -28.5 -26.1 -25.5 -25.7 -25.7 -26.0 -26.3 -26.4 -26.9 -27.2 -27.8 -28.3 -28.7 -29.0 -28.9 -30.0 -30.5 -31.0 -31.8 -32.2 -33.5 -34.1 -35.1 -34.9 -36.1 -35.8 -39.4 -39.9 -42.4 -41.3
S12 MAG. 0.037 0.049 0.052 0.052 0.052 0.050 0.048 0.048 0.045 0.043 0.040 0.038 0.036 0.035 0.035 0.031 0.030 0.028 0.025 0.024 0.021 0.019 0.017 0.017 0.015 0.016 0.010 0.010 0.007 0.008
S22 ANG. 48.2 23.2 10.8 3.3 -4.1 -8.9 -12.6 -17.0 -22.1 -21.9 -26.9 -29.2 -30.5 -31.4 -36.6 -38.5 -38.3 -38.7 -38.1 -40.9 -42.9 -48.0 -43.6 -40.8 -49.0 -36.8 -33.0 -43.4 -18.3 -15.0 MAG. 0.517 0.569 0.598 0.618 0.641 0.660 0.681 0.696 0.715 0.732 0.749 0.763 0.776 0.789 0.803 0.808 0.814 0.829 0.834 0.840 0.842 0.847 0.856 0.866 0.862 0.865 0.866 0.879 0.879 0.885 ANG. -85.0 -120.7 -136.5 -144.8 -149.5 -153.4 -156.2 -158.9 -161.0 -162.9 -164.9 -166.9 -169.1 -171.0 -172.7 -175.0 -176.7 -179.2 178.7 176.5 174.4 172.1 169.1 167.0 164.7 162.0 159.1 156.7 154.5 152.0
2
MAG Note MSG Note dB dB 26.8 23.9 22.1 21.0 20.1 19.3 18.8 18.1 17.9 17.4 17.2 17.0 16.8 16.5 16.1 16.3 16.0 16.1 16.0 16.1 12.4 11.7 10.9 11.5 10.2 10.1 7.8 8.6 7.6 8.2
K
0.00 0.06 0.08 0.11 0.13 0.18 0.22 0.23 0.28 0.33 0.35 0.42 0.45 0.48 0.44 0.62 0.78 0.70 0.98 0.97 1.42 1.62 1.88 1.68 2.20 2.13 4.44 3.96 6.01 4.60
Note When K 1, the MAG (Maximum Available Gain) is used. When K < 1, the MSG (Maximum Stable Gain) is used.
MAG = S21 S12 MSG = S21 S12
(K - (K - 1) ) ,K= 1+ -S11 -S22 , 2 S12S21
2 2 2
= S11 S22 - S21 S12
LARGE SIGNAL IMPEDANCE (VDS = 4.8 V, IDset = 100 mA, Pin = 20 dBm)
f (GHz) 1.9 Zin () TBD ZOL () Note TBD
Note ZOL is the conjugate of optimum load impedance at given voltage, idling current, input power and frequency.
Data Sheet PU10118EJ01V1DS
7
NE5500179A
PACKAGE DIMENSIONS 79A (UNIT: mm)
(Bottom View)
4.2 MAX. Source 1.50.2 Source
1
2
4.4 MAX.
5.7 MAX.
R
9
0.40.15 5.7 MAX.
0.20.1
0.80.15
1.0 MAX.
0.8 MAX. 3.60.2
79A PACKAGE RECOMMENDED P.C.B. LAYOUT (UNIT: mm)
4.0 1.7
0.90.2
Source
Stop up the hole with a rosin or something to avoid solder flow.
Gate
Drain
5.9
1.0
0.5
Through Hole: 0.2 x 33 0.5 0.5 6.1
8
Data Sheet PU10118EJ01V1DS
1.2
1.2 MAX.
Gate
0.60.15
Drain
Gate
Drain
NE5500179A
! RECOMMENDED SOLDERING CONDITIONS
This product should be soldered and mounted under the following recommended conditions. methods and conditions other than those recommended below, contact your nearby sales office.
Soldering Method Infrared Reflow Soldering Conditions Peak temperature (package surface temperature) Time at peak temperature Time at temperature of 220C or higher Preheating time at 120 to 180C Maximum number of reflow processes Maximum chlorine content of rosin flux (% mass) Peak temperature (package surface temperature) Time at temperature of 200C or higher Preheating time at 120 to 150C Maximum number of reflow processes Maximum chlorine content of rosin flux (% mass) Peak temperature (molten solder temperature) Time at peak temperature Preheating temperature (package surface temperature) Maximum number of flow processes Maximum chlorine content of rosin flux (% mass) Peak temperature (pin temperature) Soldering time (per pin of device) Maximum chlorine content of rosin flux (% mass) : 260C or below : 10 seconds or less : 60 seconds or less : 12030 seconds : 3 times : 0.2%(Wt.) or below : 215C or below : 25 to 40 seconds : 30 to 60 seconds : 3 times : 0.2%(Wt.) or below : 260C or below : 10 seconds or less : 120C or below : 1 time : 0.2%(Wt.) or below : 350C or below : 3 seconds or less : 0.2%(Wt.) or below Condition Symbol IR260
For soldering
VPS
VP215
Wave Soldering
WS260
Partial Heating
HS350-P3
Caution Do not use different soldering methods together (except for partial heating).
Data Sheet PU10118EJ01V1DS
9
NE5500179A
* The information in this document is current as of March, 2002. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products and/or types are available in every country. Please check with an NEC sales representative for availability and additional information. * No part of this document may be copied or reproduced in any form or by any means without prior written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document. * NEC does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC semiconductor products listed in this document or any other liability arising from the use of such products. No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC or others. * Descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software and information in the design of customer's equipment shall be done under the full responsibility of customer. NEC assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. * While NEC endeavours to enhance the quality, reliability and safety of NEC semiconductor products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize risks of damage to property or injury (including death) to persons arising from defects in NEC semiconductor products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment, and anti-failure features. * NEC semiconductor products are classified into the following three quality grades: "Standard", "Special" and "Specific". The "Specific" quality grade applies only to semiconductor products developed based on a customer-designated "quality assurance program" for a specific application. The recommended applications of a semiconductor product depend on its quality grade, as indicated below. Customers must check the quality grade of each semiconductor product before using it in a particular application. "Standard": Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots "Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) "Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. The quality grade of NEC semiconductor products is "Standard" unless otherwise expressly specified in NEC's data sheets or data books, etc. If customers wish to use NEC semiconductor products in applications not intended by NEC, they must contact an NEC sales representative in advance to determine NEC's willingness to support a given application. (Note) (1) "NEC" as used in this statement means NEC Corporation, NEC Compound Semiconductor Devices, Ltd. and also includes its majority-owned subsidiaries. (2) "NEC semiconductor products" means any semiconductor product developed or manufactured by or for NEC (as defined above).
M8E 00. 4 - 0110
10
Data Sheet PU10118EJ01V1DS
NE5500179A
Business issue NEC Compound Semiconductor Devices, Ltd. 5th Sales Group, Sales Division TEL: +81-3-3798-6372 FAX: +81-3-3798-6783 E-mail: salesinfo@csd-nec.com NEC Compound Semiconductor Devices Hong Kong Limited Hong Kong Head Office FAX: +852-3107-7309 TEL: +852-3107-7303 Taipei Branch Office TEL: +886-2-8712-0478 FAX: +886-2-2545-3859 Korea Branch Office FAX: +82-2-528-0302 TEL: +82-2-528-0301 NEC Electron Devices European Operations http://www.nec.de/ TEL: +49-211-6503-101 FAX: +49-211-6503-487 California Eastern Laboratories, Inc. http://www.cel.com/ TEL: +1-408-988-3500 FAX: +1-408-988-0279 Technical issue NEC Compound Semiconductor Devices, Ltd. http://www.csd-nec.com/ Sales Engineering Group, Sales Division E-mail: techinfo@csd-nec.com FAX: +81-44-435-1918
0110


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